The present disclosure relates to a multilayer ceramic capacitor and a board for mounting the same.
In accordance with the recent trend toward miniaturization and high capacitance of electronic products, the demand for an electronic component has been increased for use in the electronic products having a small size and high capacitance.
In the case of a multilayer ceramic capacitor, when equivalent series inductance (hereinafter, referred to as “ESL”) increases, performance of an electronic product may be deteriorated. In addition, as the applied electronic component has been miniaturized and had high capacitance, an influence of an increase in ESL of the multilayer ceramic capacitor on deterioration of performance of the electronic product relatively increased.
Particularly, in accordance with high performance of an integrated circuit (IC), use of a decoupling capacitor increases. Therefore, a demand has been increased for a multilayer ceramic capacitor (MLCC) having a 3-terminal vertical multilayer structure, so-called, “low inductance chip capacitor (LICC)” capable of decreasing inductance of the capacitor by decreasing a distance between external terminals to decrease a current flow path.